There are many systems applications where an accurate conversion of an input current to a voltage output is required. This process is called Transimpedance Amplification (TA). In addition, the source of signal current may be a sensor element (such as, for example, a photodiode) in which the voltage across the photodiode must be held to a value as close to 0 volts as possible to minimize error producing leakage currents. The use of an operational amplifier (OA) to hold the voltage across the sensor element at 0 Volts (0V) with a feedback resistor converts the signal current to a voltage.
As is true with most sensor interface problems, the requirement exists to maximize the Signal-to-Noise (SIN) ratio due to the need to detect smaller and smaller signal currents. This drive toward higher sensitivity implies the need to implement increasingly larger values of the feedback resistor. In tandem, there is always the desire to maximize the accuracy of the sensor as well as to increase its bandwidth. This desire results in the need for the feedback resistor to be as linear as possible over its operating voltage and temperature range and for its implementation to minimize any parasitic elements. Finally, the requirement to package this high sensitivity TA in as small a volume as possible due to the physical placement of the sensor into tight locations exists. This miniaturization requirement leads to the need to implement a self contained TA in integrated circuit form.
In an integrated circuit TA the physical size of the resistance element presents a problem. If implemented with available on-chip resistors, this resistor will become physically quite large to the point of increasing cost to an unfeasible level for all but the lowest sensitivity applications. In response to this problem a metal-oxide-semiconductor (MOS) transistor as a resistor based on the knowledge that a MOS device is effectively a voltage controlled resistor when operated in its triode region has been used in TA circuits.
MOS parameters include surface mobility (μ), gate capacitance (Cox), width (W) and length (L). The combination of MOS parameters sets the maximum resistance the device can exhibit and the externally generated control signal (Vg) is then used to modulate the resistance to a lower value as required. This modulation can be used to counteract temperature effects and MOS device non-linearity.
A non-linearity that must be dealt with in a TA implementation using a MOS device is saturation. The drain saturation voltage (Vdsat) limits the usable range of output voltage for a particular value of Vgs. This problem can be a significant problem in low voltage circuits, and can be addressed using a voltage divider circuit to scale the drain voltage (Vds) of the MOS device to a value that is within its linear range.
An additional non-linearity to be overcome centers on the Vds vs Ids characteristic of the MOS device while the device is operating within its triode region. If the TA is to be operated under constant Vgs conditions, the value of Vgs will have to be very large when compared to the device's Vds. Assuming constant Vgs operation, this operation also means that the W/L of the device will have to be reduced as the value of Vgs is increased such that the product of (Vgs−Vto)×(W/L) remains constant. This geometric ratio increase will increase the MOS device's gate area which will decrease its bandwidth capability. The trade here is to increase the voltage divider ratio, but this will significantly increase the offset error term in most cases.
Taking all of the above trade factors into consideration, the concept of implementing an integrated circuit TA using an MOS device under constant Vgs bias as the resistance element is considered to be impractical in many cases except those in where accuracy is not a primary requirement. To solve this problem, the use of a variable gate bias as a function of the input signal current has been developed. The gate bias is derived and is modulated by the output voltage of the TA. However, a need still exists for a TA with highly linear operation.